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general description the MAX5922a/b/c is a single-port network power con- troller with an integrated power mosfet, operating from a +32v to +60v supply rail. the device is specifically designed for power-sourcing equipment (pse) in power- over-lan applications and is fully compliant to the ieee 802.3af standard. the MAX5922 provides power devices (pd) discovery, classification, current limit, and other nec- essary functions for an ieee 802.3af compliant pse. the MAX5922 is suitable for pse function in both switch/router systems where the power is delivered to the load through the signal pairs, and in midspan systems where the power is delivered to the load through the spare pairs. in midspan mode, a detection collision avoidance circuit (MAX5922a/c only) provides the nec- essary back-off timing to prevent fault detections that happen when two different pses try to detect and power the same pd. the MAX5922b/c have a detec- tion disable input that can be connected high to disable the detection/classification functions or connected low to enable them. the MAX5922 features a programmable undervoltage lockout (uvlo) that keeps the device in shutdown until the input voltage exceeds a certain threshold, set to 38v (MAX5922a) or 28v (MAX5922b/c) internally. after suc- cessfully discovering and classifying a pd, the MAX5922 enters startup mode. during startup, the MAX5922 limits the output voltage and current slew rate to minimize emi (electromagnetic interference). the MAX5922 has an inte- grated 0.45 ? n-channel power mosfet that provides efficient operation and simplified system design. the MAX5922 monitors and provides current-limit protection to the load at all times. the current limit is programmable using an external current-sensing resistor. the MAX5922 features current-limit foldback and duty-cycle limit to ensure robust operation during load-fault and short-circuit conditions. fault management allows the part to either latch-off or autorestart after a fault. the MAX5922 provides pok, zc, and fault status sig- nals to indicate output power is good, zero-current fault, and other faults (overcurrent, overtemperature), respec- tively. the MAX5922 is available in a 28-pin tssop pack- age and is rated over the extended -40? to +85? temperature range. features ieee 802.3af compliant +32v to +60v wide operating input range 0.45 ? integrated power switch power device (pd) detection and classification 100a pd leakage detection tolerant programmable current limit zero-current detection with status output detection collision avoidance option for midspan application input logic signals compatible with 1.8v to 5v cmos logic separate analog and digital grounds with up to 4v offset power-good status output overcurrent and overtemperature protection with status outputs current-limit foldback with timeout and duty- cycle control latch or autorestart fault management applications MAX5922 +48v, single-port network power switch for power-over-lan ________________________________________________________________ maxim integrated products 1 19-2708; rev 0; 4/03 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package MAX5922aeui -40 c to +85 c 28 tssop MAX5922beui -40 c to +85 c 28 tssop MAX5922ceui -40 c to +85 c 28 tssop ordering information typical application circuits, selector guide, and pin configuration appear at end of data sheet. power-sourcing equipment (pse) power-over-lan/power-over-mdi (media-dependent interface) computer telephony single-port power injector/adapter midspan power injector switches/routers with in-line power
MAX5922 +48v, single-port network power switch for power-over-lan 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages with respect to agnd_s, unless otherwise noted.) in ............................................................................-0.3v to +76v uvlo ........................................................................-0.3v to +6v v dig to dgnd ..........................................................-0.3v to +6v out .......................................................-0.3v to (v drain + 0.3v) drain ..........................................................-0.3v to (v in + 0.3v) rdt.........................................................................-0.3v to +12v rcl to in ................................................................-10v to +0.3v en, det_dis, dca, class, zc_en, and latch to dgnd ...........................................-0.3v to +6v pok, zc , cl0, cl1, cl2, and fault to dgnd......-0.3v to +6v dgnd ..........................................................................-5v to +5v maximum current into drain .................................................0.8a maximum current into pok, zc , cl0, cl1, cl2, fault ...20ma continuous power dissipation (t a = +70 c) 28-pin tssop (derate 12.8mw/ c above +70 c) .....1026mw operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +160 c lead temperature (soldering, 10s) .................................+300 c electrical characteristics (v in = 48v, v dig = 3.3v, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo = open, en = v dig , r rcl = 150 ? 1%, r rdt = 18.2k ? 1%, t a = -40 c to +85 c, unless otherwise noted. typical values are at t a = +25 c.) (note 1) parameter symbol conditions min typ max units analog input voltage range v in 32 60 v analog input supply current i in v in = 60v, measured at agnd after out has stopped slewing 11.6ma digital input voltage range v dig 1.65 5.50 v digital input supply current i dig v dig = 5v 0.05 0.1 ma dgnd to agnd operating voltage range -4 +4 v current-limit response time out shorted to agnd (note 2) 1 s out current-limit foldback voltage v fbstop (note 3) 18 v maximum voltage across r sense at v out > v fbstop 198 212 223 current-limit sense voltage (v in - v drs ) (note 4) v ilim 0 c to +70 c 203 212 221 mv current-limit sense foldback voltage (v in - v drs ) v ilim_fb v out = 0v 64 70 76 mv overcurrent timeout t oc out shorted to agnd (note 5) 50 60 75 ms t a = +25 c0.45 d mos on-resistance r dson i out = 100ma t a = +85 c0.75 ? power-off out sink current en = dgnd, v out = 48v 15 a maximum output voltage slew rate dv out /dt v out rising, no load 100 v/ms maximum output current slew rate di out /dt v out rising, c load = 100f 35 a/ms v out rising, pok from low to high 650 750 850 mv power-ok threshold (v in - v out )v thpok hysteresis 10 % pok output low voltage v pok_low i pok = 3ma 0.4 v pok output leakage current v pok = 3.3v 0.05 1 a
MAX5922 +48v, single-port network power switch for power-over-lan _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = 48v, v dig = 3.3v, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo = open, en = v dig , r rcl = 150 ? 1%, r rdt = 18.2k ? 1%, t a = -40 c to +85 c, unless otherwise noted. typical values are at t a = +25 c.) (note 1) parameter symbol conditions min typ max units t pok_low pok from high to low, v out falling 1.0 1.4 1.8 pok output delay (note 6) t pok_high pok from low to high, v out rising 74 88 102 ms zero-current detection threshold voltage (v in - v drs ) v zcth (note 4) 2.7 3.75 4.8 mv zc output low voltage v zc _low i zc = 3ma 0.4 v zc output leakage current v zc = 3.3v 0.05 1 a zero-current detection delay t zcdel zc from high to low, i out falling (note 7) 300 350 400 ms zero-current deglitch time t zc_deg i out rising 10 ms temperature rising 150 c thermal shutdown hysteresis 30 c shutdown autorestart time t restart latch = low (note 8) 1.60 1.92 2.24 s undervoltage lockout MAX5922a 36 38 40 uvlo floating, v in rising MAX5922b/ MAX5922c 26 28 30 MAX5922a 4.4 default v in uvlo uvlo th hysteresis MAX5922b/c 2.5 v MAX5922a 1.36 1.38 1.41 referenced to agnd_s, v uvlo rising MAX5922b/ MAX5922c 1.31 1.33 1.36 v MAX5922a 160 uvlo comparator threshold v ref hysteresis MAX5922b/ MAX5922c 120 mv uvlo input resistance 50 k ? logic signals en, latch, dca, det_dis class, and zc_en input high voltage v ih 1.65v < v dig < 5.5v 0.7 v dig v 1.65v < v dig < 2.0v 0.3 v dig en, latch, dca, det_dis class, and zc_en input low voltage v il 2.0v < v dig < 5.5v 0.8 v en, latch, dca, det_dis class, and zc_en input current -1 +1 a en low pulse width 3s fault , cl0, cl1 and cl2, output low voltage v ol i sink = 3ma 0.4 v fault , cl0, cl1 and cl2, output leakage current v fault = v cl0 = v cl1 = v cl2 = 3.3v, class = 0v 0.05 1 a
MAX5922 +48v, single-port network power switch for power-over-lan 4 _______________________________________________________________________________________ electrical characteristics (continued) (v in = 48v, v dig = 3.3v, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo = open, en = v dig , r rcl = 150 ? 1%, r rdt = 18.2k ? 1%, t a = -40 c to +85 c, unless otherwise noted. typical values are at t a = +25 c.) (note 1) parameter symbol conditions min typ max units pd detection (see figure 3, pd detection section) detection probe voltage phase i v pbi r pd = 19k ? to 26.5k ? 3.6 4 4.4 v detection probe voltage phase ii v pbii r pd = 19k ? to 26.5k ? 7.2 8 8.8 v detection short-circuit current i sc_det out shorted to agnd 0.68 1.50 ma valid pd detected lower-limit threshold r pdl (note 9) 15 19 k ? valid pd detected upper-limit threshold r pdh (note 9) 26.5 33.0 k ? total detection time t det 170 196 ms reject capacitance during detection c pdh r pd = 19k ? to 26.5k ? 6f allowable capacitance during detection c pdl r pd = 19k ? to 26.5k ? 0.6 f pd classification (see pd classification mode section) i out = 0.5ma to 45ma 15 20 classification probe voltage v class no load 28 v classification short-circuit current i sc_class shorted to agnd 48 65 ma classification time duration t class from detection completion 15 21.3 26 ms total detection and classification delay time t tot from channel-enabled to power delivered at the out pin 191 230 ms class 0 to class 1 threshold i class_1l 5.5 6.5 7.5 ma class 1 to class 2 threshold i class_1-2 13 14.5 16 ma class 2 to class 3 threshold i class_2-3 21 23 25 ma class 3 to class 4 threshold i class_3-4 31 33 35 ma default to class 0 high-current lower-limit threshold i class_4-0 43 46.5 ma collision detection delay time (MAX5922a/MAX5922c only) t dca dca = high, r pd = 15k ? 2.38 2.8 3.22 s note 1: all specifications are 100% production tested at t a = +25 c, unless otherwise noted. all temperature limits are guaranteed by design. note 2: this is the time from an output overcurrent or short-circuit condition until the output goes into regulated current limit. note 3: out voltage above which the output current limit is at its full value (see figure 8). note 4: to be consistent with the ieee 802.3af standard, choose r sense = 0.5 ? 1%. note 5: this is the time the part stays in current-limit mode during overload condition. after t oc elapses (or when the junction temperature hits +150 c) the part shuts down. note 6: see the typical operating characteristics and figure 6. note 7: this is the delay from i out falling below the zero-current threshold until zc goes low and the ic shuts down (see the zero-current detection section). note 8: see the fault management section. note 9: pd is detected by the procedures specified by the ieee 802.3af standard. a probe voltage v pbi (+4v typically) is forced at out and the current i s1 is measured after t det /2. a second probe voltage v pbii (+8v typically) is then forced and i s2 measured after t det / 2 again. the voltage increment is then divided by the difference of the two currents (i s2 - i s1 ). this is the pd resistance value.
MAX5922 +48v, single-port network power switch for power-over-lan _______________________________________________________________________________________ 5 v in supply current vs. input voltage MAX5922 toc01 input voltage (v) supply current (ma) 62 57 52 47 42 37 0.75 0.80 0.90 0.85 0.95 1.00 0.70 32 t a = +85 c t a = +25 c t a = -40 c measured at agnd v in supply current vs. temperature MAX5922 toc02 temperature ( c) supply current (ma) 65 50 35 20 5 -10 -25 0.75 0.80 0.90 0.85 0.95 1.00 0.70 -40 80 v in = 60v v in = 48v v in = 32v measured at agnd i dig ( a) 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.9 12.0 11.0 digital supply current vs. temperature MAX5922 toc03 temperature ( c) 65 50 35 20 5 -10 -25 -40 80 default v in uvlo (v) 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 32.0 v in undervoltage lockout vs. temperature MAX5922 toc04 temperature ( c) 65 50 35 20 5 -10 -25 -40 80 v in rising v in falling on-resistance ( ? ) 0.35 0.40 0.45 0.50 0.55 0.60 0.30 mosfet r dson vs. temperature MAX5922 toc05 temperature ( c) 65 50 35 20 5 -10 -25 -40 80 i out = 100ma sense trip voltage vs. temperature MAX5922 toc06 temperature ( c) sense trip voltage (v) 80 65 35 50 -10 5 20 -25 206 207 208 209 210 211 212 213 214 215 205 -40 v in = 60v v in = 48v v in = 32v foldback-current limit (ilim vs. v out ) MAX5922 toc07 output voltage (v) ilim (a) 45 40 30 35 10 15 20 25 5 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0 050 zero-current threshold voltage (mv) 3.52 3.54 3.56 3.58 3.60 3.62 3.64 3.66 3.68 3.70 3.50 zero-current detection threshold voltage vs. temperature MAX5922 toc08 temperature ( c) 65 50 35 20 5 -10 -25 -40 80 v in = 60v v in = 32v v in = 48v on-resistance vs. v drain MAX5922 toc09 input voltage (v) on-resistance ( ? ) 56 52 48 44 40 36 32 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.1 28 60 i out = 100ma t a = +85 c t a = +25 c t a = -40 c typical operating characteristics (MAX5922a, v in = 48v, v dig , en, latch, class, and zc_en = 3.3v, dca, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo floating, r rcl = 150k ? , r rdt = 18.2k ? , t a = +25 c, unless otherwise noted.)
MAX5922 +48v, single-port network power switch for power-over-lan 6 _______________________________________________________________________________________ typical operating characteristics (continued) (MAX5922a, v in = 48v, v dig , en, latch, class, and zc_en = 3.3v, dca, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo floating, r rcl = 150k ? , r rdt = 18.2k ? , t a = +25 c, unless otherwise noted.) digital supply current vs. v dig v dig (v) i dig ( a) 5.0 4.0 1.0 2.0 3.0 MAX5922toc10 4 6 8 10 12 14 16 18 20 22 24 26 28 30 0 2 06.0 overcurrent timeout (r load from 240 ? to 75 ? ) MAX5922 toc11 20ms/div 5v/div 0a 200ma/div 0v 5v/div v out pok i out 0v 20v/div 0v fault short-circuit response time MAX5922 toc12 20ms/div 5v/div 0a 200ma/div 0v 5v/div v out pok i out 0v 20v/div 0v fault pok low-to-high delay time MAX5922 toc13 100ms/div 0v 20v/div 0v 5v/div v out pok pok high-to-low delay time MAX5922 toc14 1ms/div 0v 20v/div 0v 5v/div v out pok zc to out delay MAX5922 toc15 400 s/div 0v 20v/div 0v 5v/div 0v 5v/div 0a 1.25ma/div v out pok zc i out
MAX5922 +48v, single-port network power switch for power-over-lan _______________________________________________________________________________________ 7 overcurrent restart delay MAX5922 toc19 400ms/div 0v 20v/div 0v 5v/div 0a 500ma/div 0v 5v/div v out pok i out fault t restart startup with valid pd (25k ? and 0.1 f) MAX5922 toc20 40ms/div 0v 20v/div 0v 5v/div 0v 5v/div 0a 200ma/div v out pok i out en startup with invalid pd (25k ? and 10 f) MAX5922 toc21 100ms/div 0v 0v 5v/div 0a 250 a/div 0v 2v/div v out pok i out en typical operating characteristics (continued) (MAX5922a, v in = 48v, v dig , en, latch, class, and zc_en = 3.3v, dca, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo floating, r rcl = 150k ? , r rdt = 18.2k ? , t a = +25 c, unless otherwise noted.) zero-current high-to-low detection time MAX5922 toc16 100ms/div 0v 20v/div 0v 5v/div 0v 5v/div 0a 1.25ma/div v out pok zc i out t zcdel zero-current (iims glitch) deglitch time MAX5922 toc17 100ms/div 0v 20v/div 0v 5v/div 0v 5v/div 0a 200ma/div v out pok zc i out t zcdel glitch > t zc_deg zero-current deglitch time (10ms glitch) MAX5922 toc18 100ms/div 0v 20v/div 0v 5v/div 0v 5v/div 0a 200ma/div v out pok zc i out t zcdel glitch > t zc_deg
MAX5922 +48v, single-port network power switch for power-over-lan 8 _______________________________________________________________________________________ startup with invalid pd (15k ? ) MAX5922 toc22 100ms/div 0v 0v 5v/div 0a 250 a/div 0v 2v/div v out pok en startup with invalid pd (33k ? ) MAX5922 toc23 40ms/div 0v 0v 5v/div 0a 250 a/div 0v 2v/div v out i out pok en startup with output shorted to agnd MAX5922 toc24 100ms/div 0v 0v 5v/div 5v/div 0a 500 a/div 0v 2v/div v out i out pok en startup with midspan mode (dca = v dig , valid pd (25k ? and 0.1 f)) MAX5922 toc25 100ms/div 0v 0v 5v/div 5v/div 0v 500 a/div 0a 20v/div v out i out pok en startup with midspan mode (dca = v dig , invalid pd (15k ? )) MAX5922 toc26 400ms/div 0v 0v 5v/div 0a 250 a/div 0v 2v/div v out i out pok en startup with midspan mode (dca = v dig, invalid pd (33k ? )) MAX5922 toc27 400ms/div 0v 0v 5v/div 0a 250 a/div 0v 2v/div v out i out pok en typical operating characteristics (continued) (MAX5922a, v in = 48v, v dig , en, latch, class, and zc_en = 3.3v, dca, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo floating, r rcl = 150k ? , r rdt = 18.2k ? , t a = +25 c, unless otherwise noted.)
MAX5922 +48v, single-port network power switch for power-over-lan _______________________________________________________________________________________ 9 startup with valid pd (25k ? , zc_en = low) MAX5922 toc28 100ms/div 0v 0v 5v/div 20v/div 0a 1.25ma/div 0v v out i out pok en startup with different pd classes MAX5922 toc29 40ms/div 0v 0v 0v 5v/div 5v/div 20ma/div 0a v out i out pok en short to agnd class 4 class 3 class 2 class 1 class 0 overcurrent timeout (r load from 240 ? to 75 ? ) MAX5922 toc30 2ms/div 5v/div 20v/div 200ma/div v out i out pok output short-circuit response MAX5922 toc31 200 s/div 200ma/div 20v/div v out i out typical operating characteristics (continued) (MAX5922a, v in = 48v, v dig , en, latch, class, and zc_en = 3.3v, dca, agnd_s = agnd = dgnd = 0v, r sense = 0.5 ? 1%, uvlo floating, r rcl = 150k ? , r rdt = 18.2k ? , t a = +25 c, unless otherwise noted.) output short-circuit response MAX5922 toc32 4 s/div 10a/div 20v/div v out i out
MAX5922 +48v, single-port network power switch for power-over-lan 10 ______________________________________________________________________________________ pin name function *agnd analog ground. this is the return of analog power input. agnd can vary 4v from dgnd. agnd and dgnd must be connected together at a single point in the system. 1, 2 drain drain connection for the integrated mosfet. connect a sense resistor, r sense , from drain to in. these pins are also the current-sense resistor negative terminal. r sense sets the overcurrent-limit and open-circuit detection threshold. these two pins must be connected together. 3, 6, 26 n.c. no connection. not internally connected. leave pins 6 and 26 open. pins 6 and 26 are left unconnected to provide additional spacing between the high-voltage pins and other pins. 4in input voltage. connect to a positive voltage source between +32v to +60v from in to agnd. this is the current-sense resistor positive terminal. bypass to agnd with a 47f, 100v electrolytic capacitor and a 0.1f, 100v ceramic capacitor. place the ceramic capacitor close to this pin. 5 rcl classification sense resistor. connect a 150 ? 1% resistor from rcl to in for sensing the classification current. leave rcl floating when the pd classification function is not used. 7 agnd_s analog ground sense. connect a 1 ? resistor from agnd_s to agnd. this resistor protects the ic during an output short-circuit condition. 8 uvlo undervoltage lockout adjustment input. referenced to agnd. connect to the center point of a resistive-divider from in to agnd to adjust the uvlo threshold. leave open for default value. 9 rdt detection sense resistor. connect an 18.2k ? 1% resistor from rdt to agnd for sensing the pd detection current. add a 680nf capacitor in parallel to this resistor to filter out the power-line noise. connect rdt to agnd when the pd detection function is not used. 10 fault fault signal open-drain logic output. reference to dgnd. fault is latched low when: 1. an overtemperature condition occurs and/or, 2. an overcurrent condition that has lasted for more than t oc . 11 pok power-ok, open-drain logic output. reference to dgnd. pok goes open drain a time t pok_high after v out raises to within v thpok from v in . pok goes low a time t pok_low after v out falls out of the v thpok from v in . 12 zc zero-current fault signal. open-drain logic output. reference to dgnd. zc is latched low when there is a zero-current condition lasting longer than t zcdel . zc is open-drain otherwise. the zero-current detection circuit is enabled immediately after the pok signal goes high. the zc is unlatched after a valid pd has been detected and eventually classified. 13 tp1 must be left open or connected to agnd 14 tp2 must be left open or connected to agnd 15 tp3 must be left open or connected to agnd 16 cl2 classification report logic output bit 2. see the pd classification section (table 2). 17 cl1 classification report logic output bit 1. see the pd classification section (table 2). 18 cl0 classification report logic output bit 0. see the pd classification section (table 2). 19 dgnd digital ground. dgnd can vary 4v from agnd. dgnd and agnd must to be connected together at a single point in the system. 20 latch fault management selection digital input. referenced to dgnd. connect to a logic high to latch off after a fault condition. connect to a logic low for automatic restart after a fault condition (see the fault management section). pin description * this is not a device pin.
MAX5922 +48v, single-port network power switch for power-over-lan ______________________________________________________________________________________ 11 pin name function 21 zc_en zero-current-detection enable logic input. referenced to dgnd. connect zc_en to a logic high to enable the zero-current detection circuitry. connect zc_en to a logic low to disable this function. 22 en on/off control-logic input. referenced to dgnd. connect to a logic high to enable the device. connect to a logic low to disable the device and reset a latched-off condition. 23 v dig digital supply voltage. v dig is the supply voltage for the internal digital logic circuity. en, latch, class, det_dis, dca, and zc_en input logic thresholds are automatically scaled to the voltage on v dig . see the typical application circuit for proper filtering. 24 class classification enable digital input. connect to dgnd to disable the classification function. connect to v dig to enable the classification function. det_dis pd detection disable logic input. when det_dis is connected to a logic high, the part skips the detection and classification (regardless of the status of class) phases and powers on immediately after en = high (MAX5922b/MAX5922c only). 25 dca detection collision avoidance logic input. connect to a logic high to activate the detection collision avoidance circuitry for midspan system. connect to dgnd to disable this function. (MAX5922a only). see the detection collision avoidance section. 27, 28 out output voltage pin description (continued) class pok vdig en latch zc_en dca cl2 cl1 cl0 dgnd n n n n n n zc fault logic- level translator logic control analog control voltage regulator osc detection and classification circuitry charge pump n in csp drain out uvlo rcl rdt agnd MAX5922 figure 1. MAX5922 block diagram
MAX5922 +48v, single-port network power switch for power-over-lan 12 ______________________________________________________________________________________ detailed description the MAX5922 is a single-port network power controller with an integrated power mosfet, operating from a +32v to +60v supply rail. the device is specifically designed for pse in power-over-lan applications and is fully compliant to the ieee 802.3af standard. the MAX5922 provides pd discovery, classification, current limit, and other necessary functions for an ieee 802.3af- compliant pse. the MAX5922 operates in three different modes: pd detection mode, pd classification mode, and power mode. figures 2 and 4 illustrates the device s functional operation. pd detection mode once powered up and enabled, the MAX5922 probes the output for a valid pd. a valid pd should have a 25k ? discovery signature characteristic as specified in the ieee 802.3af standard. table 1 shows the ieee 802.3af specification for a pse detection of pds (see the typical application circuit and figure 3 (MAX5922 startup sequence)). the MAX5922 performs the pd detection by forcing a probe voltage (v pbi = 4v) at the out pin and senses the current out of this pin. the sensed current is sampled and held t det (88ms) after the probing voltage is sent. the probe voltage is then switched to v pbii = 8v. at the end of another t det period, the ratio of the difference of the two test voltages and sensed currents ( ? v/ ? i) is calculat- ed to determine the pd resistance. the MAX5922 pd detection circuitry checks for a valid pd resistive signa- ture between 19k ? and 26.5k ? , with a parallel capaci- tance of up to 0.6f. the MAX5922 pd detection circuit rejects all pds showing resistive signature of less than 15k ? or greater than 33k ? , and/or a capacitive signature greater than 6f. any resistive signature between 15k ? to 19k ? , or between 26.5k ? to 33k ? , and/or a capaci- tance between 0.6f to 6f can produce unpredictable detection results. if the MAX5922 does not detect a valid pd signature, it continually sends the probe voltages to the output indefinitely (see figure 5). the detection current reference is set by an external resistor (r rdt) ) connected from the rdt pin to agnd. this resistor should be an 18.2k ? 1%, with an optional 680nf capacitor in parallel for filtering out power-line noise. an internal diode in series with the detection volt- age source and out is provided to restrict pd detec- tion to the 1st quadrant as specified by the ieee standard 802.3af (see figure 3). to prevent damage to non-pd devices and to protect itself from output short circuit, the MAX5922 limits the current out of the out pin during pd detection to 1.5ma (max). for midspan systems where power is delivered to the pd through the spare pairs, the detection collision avoidance must be activated. in this mode, after every failed pd detection cycle, the MAX5922a/MAX5922c enter a back-off mode where they drive the out pin into high impedance for t dca (2.8s). the dca pin must be connected high (MAX5922a) to activate the detec- tion collision avoidance circuitry (if connected low, the detection collision avoidance circuitry is disabled). the MAX5922c has the detection collision avoidance cir- cuitry permanently enabled (see the typical application circuit ). after t dca , the MAX5922a (with dca high) and the MAX5922c resume pd detection operation. the MAX5922b has the detection collision avoidance circuitry permanently disabled. detection enable/disable the MAX5922a has the pd detection mode permanently enabled. the MAX5922b/MAX5922c are equipped with a det_dis pin, which provides the option of enabling or disabling the power-device detection phase. with the det_dis pin connected high, the pd detection and clas- sification phases are disabled regardless of the status of the class pin. with the det_dis pin connected low, the pd detection is enabled. table 1. ieee802.3af pd specification parameter valid pd detection signature non-valid pd detection signature v/i (slope) 19k ? < r pd < 26.5k ? 15k ? > r pd or r rd > 33k ? input capacitance c pd < 0.6f c pd > 6f offset voltage up to 2.0v current offset up to 12a
MAX5922 +48v, single-port network power switch for power-over-lan ______________________________________________________________________________________ 13 increment overcurrent counter n n y reset overcurrent counter n pok low after t pok_dly high to low n y n en = high? reset power-on n y n reset counters start pd dectection force out = v pbi (4v) wait i/2t det cl0 = cl1 = cl2 = high start pd classification cl0 = cl1 = cl2 = high y n class = h? y start power-up reset fault and zc y increment t zcdel t zcdel = 350ms? switch shutoff fault = low y latch = hibh y en = low? y y n n n switch shut-off zc = low reset t zcdel overcurrent detected zc_en = high? n y increment t zc_deg reset t zc_deg y is dca high? sample and hold i sense1 measure i det = i sense2 - i sense1 wait t dca output in high-z n y n report class status thermal shutdown detected? n y is pok high? reset t zc_deg t zcdel y n y n t restart elapsed? y n y y v in > uvlo th ? is (v pbi - v pbi )/i det ok? v out - v in < v thpok ? overcurrent condition? overcurrent counter = 60? pok high after t pok_dly low to high is i out < i zcth ? t zc_deg = 10ms? note 1 force v out = v class (17.5v) wait t class and measure i class force out = v pbi (8v) wait 1/2t det *for the MAX5922b, the dca function is internally disabled. for the MAX5922c, the dca function is internally enabled. figure 2. operational flow chart (MAX5922a and MAX5922b/MAX5922c with det_dis connected low)
MAX5922 +48v, single-port network power switch for power-over-lan 14 ______________________________________________________________________________________ out agnd_s 27, 28 7 internal to MAX5922 v probe_voltage i max = 1.5ma d1 r pd power device figure 3. pse detection source increment overcurrent counter n n y n y n en = high? reset power-on n y n t zcdel = 350ms? y y y n n n n y y n y y n y n y n y y overcurrent = high overcurrent counter = 60? start power-up reset fault, zc overcurrent detected n y reset overcurrent counter y v out - v in < v thpok ? v in > uvlo th ? en = low? latch = high? t restart elapsed switch shut-off fault = low thermal shutdown detected? switch shut-off zc = low reset t zcdel increment t zcdel reset t zc_deg is i out < i zcth ? pok high after t pok_dly low to high increment t zc_deg t zc_deg = 10ms? reset t zc_deg t zcdel en low to high transaction detected? pok low after t pok_dly high to low zc_en = high? is pok high? figure 4. operational flow chart (MAX5922b/MAX5922c with det_dis connected high)
MAX5922 +48v, single-port network power switch for power-over-lan ______________________________________________________________________________________ 15 pd classification mode (pd classification) following a valid pd detection, and if the class pin is high, the MAX5922 enters the pd classification mode. if the class pin is low, the pd classification mode is skipped and the MAX5922 goes directly from pd detection to the power mode. during the pd classifica- tion mode, the MAX5922 forces a probe voltage (17.5v) at the out pin and measures the current out of this pin. the measured current determines the class of the pd. the classification results are reported at the classifica- tion logic outputs cl0, cl1, cl2. table 2 shows the classification threshold limits and the corresponding logic outputs cl0, cl1, and cl2. connect an external 150 ? 1% resistor (r rcl ) from rcl to in to set the classification current reference. if the pd classification function is not used, rcl can be left floating. for the MAX5922b/MAX5922c, the det_dis pin must be connected low to enable the classification phase. if det_dis is connected high, the classification phase is disabled regardless of the state of the class pin. after the classification phase, the MAX5922 enters power-up. power-up mode after the pd is successfully detected and classified, the MAX5922 enters power-up mode. during this mode, the MAX5922 gradually turns on the integrated n-chan- nel mosfet. to minimize emi, the MAX5922 limits the table 2. pd classification threshold limits sensed current (ma) cl2 cl1 cl0 class types 0.5 to 4 or above 43 0 0 0 class 0 9 to 12 0 0 1 class 1 17 to 20 0 1 0 class 2 26 to 30 0 1 1 class 3 36 to 42 1 0 0 class 4 n/a 1 0 1 not used n/a 1 1 0 successful detection (classification disabled or det_dis = low) power device not detected yet or class pin connected low. 1 1 1 detection ongoing t 0v t det1 = 88ms t det2 = 88ms uvlo 8v 4v v in v out figure 5. pd detection with an invalid pd signature
MAX5922 +48v, single-port network power switch for power-over-lan 16 ______________________________________________________________________________________ output voltage slew rate at the out pin to dv out /dt = 100v/ms (max) and the output-current slew rate out of the out pin to di out /dt = 35a/ms (max). the MAX5922 has an integrated 0.45 ? n-channel power mosfet. the mosfet s drain is connected to the drain pin and its source is connected to the out pin. the MAX5922 monitors and provides current-limit protection to the load at all times. the current limit is programmable using an external current-sensing resis- tor connected from in to drain. to be compatible with the iee802.3af standard, use a 0.5 ? 1%, 50ppm/ c resistor. the MAX5922 features current-limit foldback and duty-cycle limit to ensure robust operation during load-fault and short-circuit conditions (see the overcurrent protection section). when v out is within 750mv of v in for more than t pok_high , pok goes open drain. figure 6 shows a typical startup sequence. after pok is asserted, the MAX5922 activates the zero- current detection function. this function monitors the output for an undercurrent condition and eventually turns off the power to the output if the pd is disconnect- ed (see the zero-current detection section). undervoltage lockout (uvlo) the MAX5922 operates from a +32v to +60v supply voltage range and has a default uvlo set at +38v (MAX5922a) or +28v (MAX5922b/MAX5922c). the uvlo threshold is adjustable using a resistive-divider connected to the uvlo pin (see figure 7). when the input voltage is below the uvlo threshold, all operation stops and the mosfet is held off. when the input volt- age is above the uvlo threshold and en is high, the MAX5922 goes into operation. see figures 2 and 4 for the operational flow charts. to adjust the uvlo threshold, connect an external resistive-divider from in to uvlo and then from uvlo to agnd. use the following equation to calculate the new uvlo threshold: v ref is typically 1.38v (MAX5922a) or 1.33v (MAX5922b/ MAX5922c). the uvlo pin input resistance is 50k ? (min), keep the r1 and r2 parallel combination value at least 20 times smaller than 50k ? to minimize the new uvlo threshold error. vv r r uvlo th ref _ =+ ? ? ? ? ? ? 1 1 2 t pok_high , 88ms t det2 , 88ms t det1 , 88ms t class , 21.3ms t pok (open-drain) 0v 0 0v +4v +8v +17.5v +48v v in crosses uvlo 100v/ms (max) figure 6. startup sequence
MAX5922 +48v, single-port network power switch for power-over-lan ______________________________________________________________________________________ 17 digital logic v dig is the input supply for the internal logic circuitry. the logic input thresholds of en, latch, class, dca (MAX5922a), det_dis (MAX5922b/MAX5922c), and zc_en are cmos compatible and are determined by the voltage at v dig which can range from 1.65v to 5.5v. the pok, zc , cl0, cl1, cl2, and fault outputs are open drain. v dig and all logic inputs and outputs are referenced to dgnd. dgnd is not connected to agnd internally and must be connected externally at a single point in the system to agnd. the maximum allowable difference in the voltage between dgnd and agnd is 4v. enable (en) en is a logic input to enable the MAX5922. bringing en low halts all operations and turns off the internal power mosfet. when en is high and the input voltage is above the uvlo threshold, the MAX5922 begins oper- ating. enable is also used to unlatch the part after a latched fault condition. this is done by toggling en low and high again after a fault condition. overcurrent protection the MAX5922 provides a sophisticated overcurrent protection circuitry to ensure the device s robustness under output-current transient and current fault condi- tions. the current protection circuitry employs a con- stant current limit, a current foldback, and an overcurrent timeout. the device monitors the voltage drop, v sense (v sense = v in - v drain ) to determine the load current. constant current limit the MAX5922 monitors v sense at all times during power mode and regulates the current through the power mosfet as necessary to keep v sense (max) to the current-limit sense voltage (v ilim = 212mv). the load-current limit, i lim , is programmed by the current- sense resistor, r sense , connected from in to drain (i lim = v ilim /r sense ). when the load current is less than i lim , the mosfet is fully on. when the load is try- ing to draw more than i lim , the out pin works like a constant current source, limiting the output current to i lim . if i out is at i lim for greater than the current-limit timeout, a current-limit fault is generated and the power mosfet is turned off (see the overcurrent timeout and fault management sections). current foldback while in current-limit condition, the voltage at the out pin drops. as the load resistance reduces (more load- ing), the output voltage reduces accordingly to main- tain a constant load current. the power dissipation in the power mosfet is (v drain - v out ) i lim . as the output voltage drops lower, more power is dissipated across the power mosfet. to reduce this power dissi- pation, the MAX5922 offers a current foldback feature where it linearly reduces the v ilim value when v out drops below the out current-limit foldback voltage (v fbstop = 18v). figure 8 illustrates this current fold- back limit behavior. overcurrent timeout the MAX5922 keeps track of the time it is in current limit. an internal digital counter begins incrementing its count at 1count/ms when v sense exceeds its limit (either v ilim or v ilim foldback in foldback mode). the counter is reset to zero if the current falls back below the current limit. when the cumulative count reaches 60, an overcurrent fault is generated. after an overcurrent fault condition, the switch is turned off and the fault signal goes low (see figure 9). MAX5922 in uvlo agnd_s r1 r2 v in = 32v to 60v figure 7. setting undervoltage lockout with an external resistive-divider v ilm v ilm /3 v fbstart (2v) v fbstop (18v) v out (v) figure 8. current foldback characteristic
MAX5922 +48v, single-port network power switch for power-over-lan 18 ______________________________________________________________________________________ this overcurrent timeout enables the MAX5922 to operate in a periodic overcurrent condition without causing a fault (see figure 9). power-ok (pok) pok goes open-drain t pok_high (88ms) after v out rises to within v thpok (0.75v) from v in . pok goes low t pok_low (1.4ms) after v out drops 0.82v below v in . zero-current detection zero-current detection is enabled if zc_en is high and only after the startup period has finished (indicated by pok going high). when v sense falls below the zero- current threshold (v zcth ) for a continuous t zcdel = 350ms, a zero-current fault is generated. the mosfet is turned off and zc is latched low. the MAX5922a and the MAX5922b/MAX5922c (with det_dis = low) imme- diately begin a pd detection sequence, regardless of the status of the latch input. zc is unlatched and goes high impedance after a pd is detected. zc is also high impedance during initial power-up. when det_dis is high (MAX5922b/MAX5922c), a zero-cur- rent fault shuts down the mosfet and the en pin needs to be toggled to unlatch the fault. at any time during a zero-current condition, if v sense goes above v zcth for the zero-current deglitch time (t zc_deg = 10ms), the zero-current counter resets to zero and a zero-current fault is not generated. bring zc_en low to disable the zero-current detection func- tion. zc stays high impedance in this mode. thermal shutdown if the MAX5922 die temperature reaches +150 c, an overtemperature fault is generated. the mosfet turns off and fault goes low. the MAX5922 die tempera- ture must cool down below 120 c before the overtem- perature fault condition is removed (see fault management section). fault report ( fault ) fault goes low when there is an overcurrent fault and/or an overtemperature fault. fault is open-drain otherwise. after a fault, the fault signal is latched low. fault is unlatched at the beginning of the next power mode. fault management the MAX5922 offers either latched-off or auto-retry fault management configurable by the latch input. bringing latch high puts the device into latch mode while pulling latch low selects the autoretry option. in latch mode, the MAX5922 turns the mosfet off and keeps it off after an overcurrent fault or an over-temper- ature fault. after the fault condition goes away, recycle the power supplies or toggle the en pin low and high again to unlatch the part. however, the part waits a t restart period (1.92s) before recovering from a fault condition and resuming normal operation. in autoretry mode, the MAX5922 turns the mosfet off after an overcurrent or overtemperature fault. after the fault condition is removed, the device waits a t restart period (1.92s) and then automatically restarts and enters the pd detection mode (MAX5922a and MAX5922b/MAX5922c with det_dis low). if det_dis is high (MAX5922b/MAX5922c), the MAX5922b/ MAX5922c automatically restart into the power-up mode after t restdrt . if the fault was due to an overtemperature condition, the MAX5922 waits for its die temperature to cool down below the hysteresis level before starting the t restart time. detection collision avoidance detection collision avoidance is enabled by connecting the dca pin directly to v dig and disabled by connect- ing it to dgnd. when dca is high, the MAX5922a acti- vates a back-off time, t dca (2.8s), after every failed detection during pd detection mode. during this back- off time, the MAX5922a turns off the mosfet and dri- ves the out pin to high impedance. this function is required by the ieee 802.3af standard if the pse resides in a midspan system. after t dca , the MAX5922a starts a pd detection sequence. the MAX5922b has this function internally disabled and the MAX5922c has this function internally enabled. t oc t restart t < t oc t 0v v fault 0v i out i limit figure 9. overcurrent response
MAX5922 +48v, single-port network power switch for power-over-lan ______________________________________________________________________________________ 19 chip information transistor count: 8687 process: bicmos part pin-package detection collision avoidance pd detection disable MAX5922aeui 28 tssop selectable MAX5922beui 28 tssop disabled selectable MAX5922ceui 28 tssop enabled selectable selector guide pin configuration 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 out out n.c. det_dis (dca) class v dig tp3 en zc_en latch dgnd cl0 cl1 cl2 tp2 tp1 zc pok fault rdt uvlo agnd_s n.c. rcl in n.c. drain drain tssop top view MAX5922a MAX5922b MAX5922c ( ) MAX5922a only.
MAX5922 +48v, single-port network power switch for power-over-lan 20 ______________________________________________________________________________________ typical application circuits MAX5922a/MAX5922b data lan switch +48v in +48v out rj45 +48v power over signal pairs cat5 rj45 pd powered device (ip phones, wireless lan access node, security camera, etc.) power sent over signal pairs MAX5922a/MAX5922c midspan hub +48v in +48v out rj45 +48v power over spare pairs cat5 rj45 pd powered device (ip phones, wireless lan access node, security camera, etc.) power sent over spare pairs cat5 rj45 rj45 8 5 9 18 17 16 7 uvlo rcl rdt cl0 cl1 cl2 agnd_s agnd 11 10 12 24 20 21 22 25 19 v dig pok fault zc class latch zc_en en dca* dgnd in drain out 4 1, 2 27, 28 MAX5922 open-drain outputs referenced to dgnd open-drain outputs referenced to dgnd 680nf r rdt 18.2k ? 1% r rcl 150 ? 1% +48v r sense 0.5 ? 1% 48v output to port off on connect dca to vdig for midspan mode note: all signal and digital inputs/outputs are referenced to dgnd. dgnd can be 4v from agnd_s. *MAX5922a only. MAX5922b/MAX5922c do not have a dca pin. 0.1 f 100v 47 f 100v 1 ? 5% 1/16w 100 ? 10 f 10v 1 f 10v v dig 1.65v to 5.5v (ref to dgnd) b1100lb 100v, 1a
MAX5922 +48v, single-port network power switch for power-over-lan maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 21 ? 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) tssop4.40mm.eps

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